CVE Database›Document archive›CVE-2025-40122

CVE-2025-40122

kernel: perf/x86/intel: Fix IA32_PMC_x_CFG_B MSRs access error

Loading…

Severity

Moderate

Red Hat Product Security

4.7

CVSS 3.1

Review impact separately from score.

Published · November 12, 2025

Updated · June 30, 2026

Description

A flaw was found in the Linux kernel’s perf subsystem.In intel_pmu_acr_late_setup(), the validation of the Auto Counter Reload (ACR) counter mask passed from user-space was incorrect: the code used i + idx > cpuc->n_events instead of >=, which could lead to an invalid bit being set in hw.config1 and written into MSR IA32_PMC_x_CFG_B, triggering unchecked MSR access errors.

CVSS score applicability

The CVSS score(s) listed for this vulnerability do not reflect the associated product's status, and are included for informational purposes to better understand the severity of this vulnerability.

Mitigation

Mitigation for this issue is either not available or the currently available options don't meet the Red Hat Product Security criteria comprising ease of use and deployment, applicability to widespread installation base or stability.

CVSS / CWE

CVSS 3.1 · 4.7
CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:U/C:N/I:N/A:H

CWE-20 · Improper Input Validation