CVE-2025-40174

flaw was found in the Linux kernel’s x86 memory‐management subsystem (function switch_mm_irqs_off()). Due to a missing smp_mb() memory‐barrier between the loaded_mm store and the tlb_gen load, the ordering of TLB (Translation Lookaside Buffer) flush operations can be violated in SMP systems. This may cause switch_mm() to not observe a recent tlb_gen update and fail to flush the TLBs properly.

A flaw of Moderate security impact was found in the Linux kernel's x86 memory-management subsystem, in switch_mm_irqs_off(). A missing smp_mb() memory barrier between the loaded_mm store and the tlb_gen load breaks the ordering guarantee that switch_mm() relies on against flush_tlb_mm_range(). On SMP systems, switch_mm() may consequently fail to observe a recent tlb_gen update and may not flush the TLB when required, leaving stale address translations in place, which can affect the confidentiality, integrity, and availability of memory contents. Red Hat rates this flaw Moderate (CVSS 3.1 score 5.8, vector AV:L/AC:H/PR:L/UI:N/S:U/C:L/I:L/A:H) rather than the upstream CVEORG Important rating of 7.8, because the issue is a timing-dependent memory-ordering race that requires local privileges and high attack complexity and is difficult to trigger reliably. All currently shipped Red Hat Enterprise Linux 7, 8, 9, and 10 kernel and kernel-rt components, as well as Red Hat In-Vehicle OS 1.1, are not affected because the vulnerable code is not present in those kernels. The Red Hat Enterprise Linux 6 Extended Lifecycle Support stream is out of Red Hat's support scope for this flaw.

The CVSS score(s) listed for this vulnerability do not reflect the associated product's status, and are included for informational purposes to better understand the severity of this vulnerability.

Mitigation for this issue is either not available or the currently available options don't meet the Red Hat Product Security criteria comprising ease of use and deployment, applicability to widespread installation base or stability.