CVE Database›Document archive›CVE-2026-43191

CVE-2026-43191

kernel: drm/amd/display: Adjust PHY FSM transition to TX_EN-to-PLL_ON for TMDS on DCN35

Loading…

Severity

Low

Red Hat Product Security

5.5

CVSS 3.1

Review impact separately from score.

Published · May 6, 2026

Updated · October 30, 2026

Description

A flaw was found in the Linux kernel's AMD display (drm/amd/display) component. An issue occurs when the physical layer's finite state machine (PHY FSM) incorrectly transitions during the disabling of Transition Minimized Differential Signaling (TMDS) output on DCN35 hardware. This can cause the Output Timing Generator (OTG) to become stuck, leading to a system hang and a denial of service.

Statement

Red Hat has rated this vulnerability as having a Low severity impact because exploitation requires local access on systems specifically equipped with AMD DCN35 hardware. In typical enterprise deployments, graphical display controllers and external monitor connections are rarely utilized, significantly limiting exposure. The issue manifests during video output power state transitions, resulting only in a localized denial of service without compromising data integrity or confidentiality.

CVSS score applicability

The CVSS score(s) listed for this vulnerability do not reflect the associated product's status, and are included for informational purposes to better understand the severity of this vulnerability.

Mitigation

No mitigation is specified in collected source.

CVSS / CWE

CVSS 3.1 · 5.5
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H

CWE-821 · Incorrect Synchronization